Methods of etching a contact opening over a node location on a semiconductor substrate

ABSTRACT

A chemical vapor deposition method includes providing a semiconductor substrate within a chemical vapor deposition chamber. At least one liquid deposition precursor is vaporized with a vaporizer to form a flowing vaporized precursor stream. The flowing vaporized precursor stream is initially bypassed from entering the chamber for a first period of time while the substrate is in the deposition chamber. After the first period of time, the flowing vaporized precursor stream is directed to flow into the chamber with the substrate therein under conditions effective to chemical vapor deposit a layer over the substrate. A method of etching a contact opening over a node location on a semiconductor substrate is disclosed.

TECHNICAL FIELD

[0001] This invention relates to chemical vapor deposition methods andto methods of etching a contact opening over a node location on asemiconductor substrate.

BACKGROUND OF THE INVENTION

[0002] The invention primarily grew out needs for making highlyreliable, high density dynamic random access memory (DRAM) contacts,although the invention is in no way so limited. Advanced semiconductorfabrication is employing increasing vertical circuit integration asdesigners continue to strive for circuit density maximization. Suchtypically includes multi-level metalization and interconnect schemes.

[0003] Electrical interconnect techniques typically require electricalconnection between metals or other conductive layers, or regions, whichare present at different elevations within the substrate. Suchinterconnecting is typically conducted, in part, by etching a contactopening through insulating material to the lower elevation of a desirednode contact, for example of a conductive layer or conductive region.The significant increase in density of memory cells and verticalintegration places very stringent requirements for contact fabricationtechnology. The increase in circuit density has resulted in narrower anddeeper electrical contact openings between layers within the substrate,something commonly referred to as increasing aspect ratio, which is theratio of maximum opening height to minimum opening width. Increasingaspect ratios make it difficult to complete etches to desired nodelocations.

[0004] For example, one typical contact etch includes the etch to asubstrate diffusion region formed within a semiconductive material whichis received between a pair of field effect transistor gate lines. Thegate lines are typically encapsulated in a silicon nitride and/orundoped silicon dioxide material. A planarized layer ofborophosphosilicate glass (BPSG) is typically provided over the fieldeffect transistors and through which a contact opening to the substratewill be etched. Further, a very thin undoped silicon dioxide layer istypically provided intermediate the BPSG layer and the underlyingsubstrate material to shield from diffusion of the boron and phosphorusdopants from the BPSG layer into underlying substrate material.Additionally or alternately, a thin silicon nitride layer might also beprovided. An antireflective layer might also be provided over the BPSG.The layers are typically masked, for example with photoresist, and acontact opening is formed through the mask over the underlying layersover the diffusion region to which contact is desired. Theantireflective coating is then etched, followed by an etch conductedthrough the BPSG which is substantially selective to the silicon nitridelayer, undoped oxide and underlying silicon substrate such that the etchis typically referred to as a substantially self-aligned contact etch.An example dry anisotropic etching chemistry for the etch includes acombination of CHF₃, CF₄, CH₂F₂ and Ar. The typical intervening undopedsilicon dioxide layer between the underlying substrate and the BPSG willtypically also be etched through in spite of a poor etch rate comparedto BPSG, principally due to the extreme thinness of this layer. Further,if silicon nitride is used in addition or in place of the undopedsilicon dioxide layer, if would typically be separately etched. At theconclusion of the etch or etches, a native oxide might grow, which couldbe stripped with a dilute HF solution prior to plugging the contactopening with conductive material(s).

[0005] When the aspect ratio of the contact opening being etched throughthe BPSG was sufficiently below 4:1, a single etch chemistry for theBPSG was typically suitable to clear the BPSG and a thin undoped siliconoxide layer all the way to the diffusion region to outwardly expose thesame, assuming silicon nitride was not present. However, as the aspectratio of the contact opening through the BPSG approached and exceeded4:1, it was discovered in some instances that the subject chemistry, andother attempted chemistries, were not sufficient to enable clearing thedoped oxide dielectric material utilizing a single chemistry and asingle etching step.

[0006] These are the circumstances which motivated the invention,although the results and objectives are in no way to be perceived asclaim limitations unless such are specifically provided in theaccompanying claims. The invention also has applicability outside of theproblems from which it spawned, with the invention only being limited bythe accompanying claims as literally worded without writing limitationsor interpretations into the claims from the specification or drawings,and as appropriately interpreted in accordance with the doctrine ofequivalents.

SUMMARY

[0007] The invention comprises chemical vapor deposition methods andmethods of etching a contact opening over a node location on asemiconductor substrate. In but one implementation, a chemical vapordeposition method includes providing a semiconductor substrate within achemical vapor deposition chamber. At least one liquid depositionprecursor is vaporized with a vaporizer to form a flowing vaporizedprecursor stream. The flowing vaporized precursor stream is initiallybypassed from entering the chamber for a first period of time while thesubstrate is in the deposition chamber. After the first period of time,the flowing vaporized precursor stream is directed to flow into thechamber with the substrate therein under conditions effective tochemical vapor deposit a layer over the substrate.

[0008] In one implementation, a method of etching a contact opening overa node location on a semiconductor substrate includes forming adielectric first layer over a node location. An oxide second layerhaving plural dopants therein is formed over the dielectric first layer.The oxide second layer has an innermost portion and an outer portion.The outer portion has a higher concentration of one of the dopants thanany concentration of the one dopant in the innermost portion. Using asingle dry etching chemistry, a contact opening is etched into the outerand innermost portions of the oxide second layer to proximate thedielectric first layer over the node location. Etching is conducted intothe dielectric first layer through the contact opening to proximate thenode location.

[0009] In one implementation, a method of etching a contact opening overa node location on a semiconductor substrate includes forming adielectric first layer over a node location. An oxide second layerhaving plural dopants therein is formed over the dielectric first layer.The oxide second layer has an innermost portion and an outer portion.The innermost portion has a higher concentration of one of the dopantsthan any concentration of the one dopant in the outer portion. Using asingle dry etching chemistry, a contact opening is etched into the outerand innermost portions of the oxide second layer to proximate thedielectric first layer over the node location. Etching is conducted intothe dielectric first layer through the contact opening to proximate thenode location.

[0010] Other implementations are contemplated.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Preferred embodiments of the invention are described below withreference to the following accompanying drawings.

[0012]FIG. 1 is a diagrammatic sectional view of a semiconductor waferfragment at one processing step in accordance with an aspect of theinvention.

[0013]FIG. 2 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 1.

[0014]FIG. 3 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 2.

[0015]FIG. 4 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 3.

[0016]FIG. 5 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 4.

[0017]FIG. 6 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 5.

[0018]FIG. 7 is a diagrammatic schematic view of exemplary semiconductorwafer fabrication equipment usable in accordance with aspects of theinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] This disclosure of the invention is submitted in furtherance ofthe constitutional purposes of the U.S. Patent Laws “to promote theprogress of science and useful arts” (Article 1, Section 8).

[0020] The invention comprises a chemical vapor deposition method. Theinvention also comprises a method of etching a contact opening over anode location on a semiconductor substrate. FIGS. 1-5 illustrate but oneexemplary semiconductor substrate 10 for processing in accordance withaspects of the invention. Semiconductor substrate 10 comprises a bulkmonocrystalline silicon substrate 12. In the context of this document,the term “semiconductor substrate” or “semiconductive substrate” isdefined to mean any construction comprising semiconductive material,including, but not limited to, bulk semiconductive materials such as asemiconductive wafer (either alone or in assemblies comprising othermaterials thereon), and semiconductive material layers (either alone orin assemblies comprising other materials). The term “substrate” refersto any supporting structure, including, but not limited to, thesemiconductive substrates described above.

[0021] Substrate 12 comprises a pair of field effect transistor gateconstructions 14 and 16 having a diffusion region 18 formed therebetweenin semiconductive material of substrate 10/12. In this example,diffusion region 18 constitutes a node location to which electricalconnection is ultimately desired. Various dielectric and conductivelayers of constructions 14 and 16 are not specifically designated as notbeing particularly relevant to the invention. In the preferredembodiments, gate constructions 14 and 16 include outermost insulativedielectric regions whereby a substantially self aligned contact etch canmade through an overlying insulative layer to region 18 without exposingconductive material of the gates in the event of some mask misalignment.Exemplary materials are as described above where the overlying layerwill be BPSG.

[0022] Referring to FIG. 2, a dielectric first layer 20 is formed overnode location 18. By way of example only, exemplary materials includesilicon nitride, substantially undoped oxide, or combinations thereof.In the context of this document, “substantially undoped” means havingessentially no measurable dopants therein, which in this specificexample would mean essentially void of either boron or phosphorous. Anexemplary preferred deposition thickness for dielectric layer 20 is from50 Angstroms to 300 Angstroms. Such is preferably conventionallychemical vapor deposited in equipment which provides adequateconformality. Exemplary equipment includes an ASM A4000 Furnace,available from ASM International N.V. of The Netherlands.

[0023] Semiconductor substrate 10 is provided within a chemical vapordeposition chamber for formation of a first dielectric layer 22 (FIG.3). FIG. 7 diagrammatically illustrates but one exemplary processingschematic usable for processing a semiconductor substrate in accordancewith methodical aspects of the invention. Such comprises an exemplarychemical vapor deposition chamber 60 within which semiconductorsubstrate 10 would be received. FIG. 7 equipment comprises first, secondand third liquid vaporizers 61, 62 and 63, which are also designated V1,V2 and V3, respectively. Such vaporizers might constitute any existingor yet-to-be developed vaporizers for liquid chemical vapor depositionprecursors. Examples include bubblers, liquid flow controllers and otherdevices which result in vaporization of liquid material for flowingvapor to a chemical vapor deposition reactor. In the illustrated andpreferred embodiment, chamber 60 is preferably a subatmospheric chemicalvapor deposition reactor, and preferably not a plasma enhanced chemicalvapor deposition reactor. The invention was reduced-to-practice usingliquid flow controllers as the vaporizers and a Centura 5200 reactoravailable from Applied Materials of Santa Clara, Calif. Vaporizers 61,62 and 63 include liquid precursor inlets 64, 65 and 66, respectively.Such vaporizers also include exiting vapor flowpaths 67, 68 and 69,respectively. Exiting streams 67, 68 and 69 join to form a combinedflowpath 70. Flowpath 70 branches into a path 72 which is directed tochamber 60 and a path 74, which by-passes chamber 60. A control valve 76is associated with lines 70, 72, and 74. Such controls the flow ofvaporized precursors to the chamber and for bypassing the chamber. Anadditional exemplary vapor input line for chamber 60 is designated withnumeral 80. An exit line 82 extends from chamber 60 and joins withbypass line 74, forming an exhaust line 84. Pressure, temperature andother control devices are not shown, as such are not particularlymaterial to the invention disclosed herein.

[0024] The description proceeds with that of only an exemplary preferredembodiment of depositing a doped oxide layer over substrate 10. In thisbut one exemplary preferred embodiment, the outermost layer of thepreferred dielectric mass being deposited will compriseborophosphosilicate glass. Thereby, feed stream 64 feeds a first liquiddeposition precursor, for example tetraethylorthosilicate (TEOS). Line65 feeds an exemplary second liquid deposition precursor oftriethylphosphate. The phosphorous in such material constitutes anexemplary first dopant to at some point be provided in the dielectricmass being formed. Line 66 feeds an exemplary third liquid depositionprecursor of triethylborate. The boron in such precursor constitutes anexemplary second precursor different from the first for provision atsome point within the dielectric mass being fabricated. In this example,line 80 constitutes an exemplary input line for a fourth vaporprecursor, here in this preferred embodiment to include one or acombination of O₂ and O₃.

[0025] In a specific and preferred embodiment, the liquid precursorflowing in stream 64 to vaporizer V1 is vaporized to form a flowingvaporized precursor within stream 67 and stream 70. Valve 76 ispreferably initially totally closed to line 72 and is preferablyinitially totally opened to line 74. Thereby, the flowing vaporizedprecursor in stream 70 is initially bypassed from entering chamber 60and allowed to flow out exhaust stream 84 for some first period of timewhile substrate 10 is within deposition chamber 60. A preferred reasonfor initially bypassing flow of the precursor to chamber 60 is that theflow of the flowing precursor from the vaporizer is typically notinitially at a desired steady state. Preferably, the period of time isselected to be effective to achieve steady state flow of the vaporizedprecursor at the conclusion of the period. Accordingly, in the typicalembodiment, flow of the vaporized precursor during the first period oftime is not steady state during all of such first period.

[0026] In conjunction with the above flowing first vaporized precursor,the second liquid deposition precursor flowing in line 65 is preferablycaused to be vaporized by vaporizer V2 to form a flowing secondvaporized precursor, in this example comprising the phosphorous dopant,within line 68 and thereby also within combined flowpath 70 with theflowing first vaporized precursor from line 67. The flowing first andsecond vaporized precursors are thereby initially bypassed withincombined flowpath 70 from entering chamber 60 for a period of time whilesubstrate 10 is within deposition chamber 60. The preferred desire andeffect is to achieve steady state flow at the desired depositionconditions of the first and second precursors within line 70 prior toflowing the same to deposition chamber 60. The period of time to achievestabilization is typically less than 10 seconds. Preferably afterachieving a steady state flow, the first and second vaporized precursorsare directed within combined flowpath 70 to flow into chamber 60 withthe substrate therein under conditions effective to chemical vapordeposit first dielectric layer 22 (FIG. 3) comprising the first dopant,in this example phosphorous, over substrate 10. Such can be accomplishedby reversing the opened/closed relationship of lines 72/74 with valve76.

[0027] Such conditions in the illustrated preferred example also includesuitable flow of an oxygen/ozone mixture through line 80 into chamber60. By way of example only, preferred flow rates from line 64 tovaporizer V1 include a TEOS flow at 600 mg/min and a flow within line 80of 12% O₃/88% O₂ by weight at 3 standard liters/min. Such is consideredin the context of a single wafer chamber 60 having a volume ofapproximately 6 liters. An exemplary pressure during deposition withinchamber 60 is 200 Torr, with the wafer chuck temperature within chamber60 preferably being maintained at about 530° C. An exemplary period oftime to achieve steady state flow prior to directing the first vaporizedprecursor to the chamber is 10 seconds or less. A specific exemplaryflow for triethylphosphate within line 65 is at 100 mg/min. A preferredresult is to achieve approximately 4% to 12% phosphorous doping withinlayer 22. An exemplary preferred thickness for layer 22 is from about 50Angstroms to about 500 Angstroms, with from about 100 Angstroms to about300 Angstroms being preferred, and from about 200 Angstroms to 275Angstroms being even more preferred.

[0028] At the conclusion of such processing, preferably any flow ofozone within layer 80 is ceased, and a pure oxygen or inert gas causedto flow therethrough. Further preferably, valve 76 is preferably totallyclosed to line 72 and valve 76 is preferably totally opened to line 74,once again causing flowing vaporized precursor from lines 67 and 68 intoline 70, into line 74 and out exhaust line 84.

[0029] In this embodiment, layer 22 is preferably as shown and describeddirectly deposited on underlying dielectric layer 20. In this justdescribed embodiment, no vaporized precursor flows from vaporizer V3 tochamber 60 during deposition of layer 22. Further, no other source ofthe second dopant is provided to chamber 60 in the depicted preferredexample. Further, the concentration of the second dopant (in thisexample, boron) in first dielectric layer 22 is thereby substantiallyzero (meaning below detectable levels) at least at this point in thepreferred embodiment process. Alternately, some third vaporizedprecursor might be caused to flow to chamber 60 during the firstdielectric depositing, with the concentration of the second dopant infirst dielectric layer 22 at this point in the process being at somedesired measurable level. Typical prior art BPSG layers comprise from2%-5% boron and from 4%-12% phosphorous, with the remainder constitutingSiO₂ (by weight). In this particular example, where borophosphosilicateglass is being formed either in FIG. 3 or ultimately, the preferredconcentration of boron within layer 22 is from 0%-4%. The preferredconcentration of phosphorus within layer 22 is from 6% to 24%. Time fordeposition of layer 22 will typically be from 2-4 seconds.

[0030] Preferably essentially simultaneously with the conclusion oflayer 22 formation, the flowing first and second vaporized precursorswithin combined flowpath 70 are bypassed from entering chamber 60 whilesubstrate 10 is therewithin. Such preferably occurs by switching valve76 completely closed to line 72 and completely opened to line 74, allwhile continuing operation of vaporizers V1 and V2. Preferablyessentially simultaneously therewith, a third deposition precursor, inthis example in the form of triethylborate, flowing in line 66 isvaporized in vaporizer V3 forming a flowing third vaporized precursorcomprising a second dopant (here, boron), different from the firstdopant, in line 69. The flowing third vaporized precursor in line 69 iscombined with the flowing bypassed first and second vaporized precursorsin combined flowpath 70, with the combined flowing first, second andthird vaporized precursors therewithin being bypassed to exhaust 84 andthereby prevented from entering chamber 60 for a period of time whilesubstrate 10 is within chamber 60. As with the above-describedprocessing, such period of time is preferably suitable to achieve steadystate flow of the combined precursors, and will typically be less than10 seconds. During the time where deposition does not occur withinchamber 60, the flow of gasses from line 80 is preferably again changedto be pure O₂ or an inert gas. In the preferred described embodiment,flows are preferably as described above, with an exemplary flow of thetriethylborate in line 66 being at 100 mg/min.

[0031] Preferably after the steady state has been achieved, the combinedflowing first, second and third vaporized precursors within combinedflowpath 70 are directed to flow into chamber 60 with substrate 10therein under conditions effective to chemical vapor deposit a seconddielectric layer 24 (FIG. 4) comprising the first and second dopantsover first dielectric layer 22, and preferably directly thereon asshown. Second dielectric layer 24 preferably comprises a greaterconcentration of the second dopant (here boron) than any concentrationof the second dopant in first dielectric layer 22. Further preferably,first dielectric layer 22 preferably comprises a greater concentrationof the first dopant (here phosphorus) than any concentration of thefirst dopant in second dielectric layer 24. A preferred thickness forlayer 24 is from 3,000 Angstroms to 15,000 Angstroms, with approximately10,000 Angstroms being a specific preferred example. In the describedexample, an exemplary preferred concentration of boron and phosphorouswithin layer 24 is 3.8% and 7.6% by weight, respectively.

[0032] The illustrated FIG. 4 construction can also be considered asconstituting an oxide second layer 25 having plural dopants therein, andwhich is formed over a dielectric first layer 20. Oxide second layer 25has an innermost portion 22 and an outer portion 24, with the outerportion having a higher concentration of one of the dopants than anyconcentration of the one dopant in innermost portion 22. Additionalportions or layers with respect oxide layer 25 might also be provided.Further as outlined above, innermost portion 22 might be fabricated tocontain no measurable quantity of the one dopant (here, boron), which ispreferred, or alternately be formed to contain some measurable quantityof the one dopant, which is not as preferred. Further, innermost portionmight also be fabricated to contain no measurable quantity of anydopant.

[0033] The FIG. 4 construction can also be considered as innermostportion 22 having a higher concentration of one of the dopants than anyconcentration of the one dopant in outer portion 24. Further, outerportion 24 might be fabricated to contain no measurable quantity of theone dopant (here, phosphorus) or alternately and preferred be formed tocontain some measurable quantity of the one dopant.

[0034] Referring to FIG. 5, substrate 10 has been removed from chamber60, has been planarized, and an antireflective coating 27 has beendeposited. An exemplary material for layer 27 is a 400 Angstrom thicksilicon rich oxynitride film, for example 54% silicon, 36% oxygen and10% nitrogen.

[0035] Referring to FIG. 6, masking has preferably been conducted overlayers 25 and 27, preferably using photolithography and photoresist. Anopening is then etched through layer 27 to expose layer 25. An exemplaryetch chemistry for the above silicon rich oxynitride coating is 80 sccmCF₄, 160 sccm Ar, and 20 sccm O₂ at 40 mTorr and 1400 Watts. Such istypically fairly non-selective, and preferably also acts as a descum toremove any residual photoresist at the base of the contact hole therein(not shown). Then using a single dry etching chemistry, a contactopening 30 is etched into outer portion 24 and innermost portion 22 toproximate dielectric layer 20 over node location 18. Reduction of boroncontent within the innermost portion of a BPSG layer, particularly whenetching high aspect ratios or at least 4.0 through layer 25, has beendetermined to facilitate achieving adequate removal in etching theexemplary contact opening, preferably at least all the way to dielectriclayer 20, and depending on the composition of layer 20 all the way toregion 18. Further, increase in phosphorus content within the innermostportion of a BPSG layer, particularly when etching high aspect ratios,has been determined to facilitate achieving adequate removal in etchingthe exemplary contact opening. Preferred is a combination of morephosphorus in the innermost portion as compared to the outer portion,and less boron in the innermost portion as compared to the outerportion. An exemplary preferred chemistry is the CHF₃, CF₄, CH₂F₂ and Archemistry described above in a magnetically enhanced reactive ion plasmareactor.

[0036] In layer 20 comprises nitride or some other material which is notsufficiently etched by the single etching chemistry for layer 25, layer20 can be suitably dry or wet etched to effectively outwardly exposenode location 18.

[0037] In compliance with the statute, the invention has been describedin language more or less specific as to structural and methodicalfeatures. It is to be understood, however, that the invention is notlimited to the specific features shown and described, since the meansherein disclosed comprise preferred forms of putting the invention intoeffect. The invention is, therefore, claimed in any of its forms ormodifications within the proper scope of the appended claimsappropriately interpreted in accordance with the doctrine ofequivalents.

1. A chemical vapor deposition method comprising: providing asemiconductor substrate within a chemical vapor deposition chamber;vaporizing at least one liquid deposition precursor with a vaporizer toform a flowing vaporized precursor stream; initially bypassing theflowing vaporized precursor stream from entering the chamber for a firstperiod of time while the substrate is in the deposition chamber; andafter the first period of time, directing the flowing vaporizedprecursor stream to flow into the chamber with the substrate thereinunder conditions effective to chemical vapor deposit a layer over thesubstrate.
 2. The method of claim 1 wherein the flowing of the vaporizedprecursor during the first period of time is not steady state during allof said first period.
 3. The method of claim 1 wherein the period oftime is effective to achieve steady state flow of the vaporizedprecursor at conclusion of said period.
 4. A chemical vapor depositionmethod of depositing a dielectric material, comprising: providing asemiconductor substrate within a chemical vapor deposition chamber;vaporizing a first liquid deposition precursor with a first vaporizerforming a flowing first vaporized precursor; vaporizing a seconddeposition precursor with a second vaporizer forming a flowing secondprecursor; bypassing at least one of the flowing first and the secondprecursors from entering the chamber for a first period of time whilethe substrate is in the deposition chamber; and after the first periodof time, directing the at least one bypassed flowing precursor to flowinto the chamber with the substrate therein.
 5. The method of claim 4comprising bypassing flowing both the first and the second precursorsfrom entering the chamber for the first period of time while thesubstrate is in the deposition chamber, the directing comprisingdirecting both the first and second precursors to flow into the chamberwith the substrate therein.
 6. The method of claim 4 comprisingbypassing the flowing first precursor during the first period, andstarting vaporizing of the second deposition precursor after saidbypassing.
 7. The method of claim 4 wherein the directing comprisesdirecting the at least one bypassed flowing precursor to flow into thechamber with the substrate therein effective to chemical vapor deposit adielectric layer on the substrate.
 8. The method of claim 4 comprisingbypass flowing both the first and the second precursors from enteringthe chamber for the first period of time while the substrate is in thedeposition chamber, the directing comprising directing both the firstand second precursors to flow into the chamber with the substratetherein effective to chemical vapor deposit a dielectric layer on thesubstrate.
 9. The method of claim 4 wherein the flowing of the at leastone of the first and second precursors during the first period of timeis not steady state during all of said first period.
 10. The method ofclaim 4 wherein the period of time is effective to achieve steady stateflow of the at least one of the first and second precursors atconclusion of said period.
 11. A chemical vapor deposition method ofdepositing a dielectric material comprising: providing a semiconductorsubstrate within a chemical vapor deposition chamber; vaporizing a firstliquid deposition precursor with a first vaporizer forming a flowingfirst vaporized precursor; vaporizing a second liquid depositionprecursor with a second vaporizer forming a flowing second vaporizedprecursor comprising a first dopant; vaporizing a third depositionprecursor with a third vaporizer forming a flowing third vaporizedprecursor comprising a second dopant different from the first dopant;directing the .flowing first vaporized precursor and the flowing secondvaporized precursor to flow into the chamber with the substrate thereinunder conditions effective to chemical vapor deposit a first dielectriclayer comprising the first dopant over the substrate; and afterdepositing the first dielectric layer, flowing the vaporized thirdprecursor into the chamber while flowing the first vaporized precursorand the second vaporized precursor into the chamber with the substratetherein under conditions effective to chemical vapor deposit a seconddielectric layer over the substrate comprising the first and seconddopants, the second dielectric layer comprising a greater concentrationof the second dopant than any concentration of the second dopant in thefirst dielectric layer.
 12. The method of claim 11 comprising depositingthe first dielectric layer to a thickness of from about 50 Angstroms toabout 500 Angstroms.
 13. The method of claim 11 comprising depositingthe first dielectric layer to a thickness of from about 100 Angstroms toabout 300 Angstroms.
 14. The method of claim 11 wherein vaporizing ofthe third precursor starts after depositing the first dielectric layer.15. The method of claim 11 wherein no third vaporized precursor flows tothe chamber during the first dielectric layer depositing.
 16. The methodof claim 11 wherein no third vaporized precursor flows to the chamberduring the first dielectric layer depositing, with the concentration ofthe second dopant in the first dielectric layer being substantiallyzero.
 17. The method of claim 11 wherein some third vaporized precursorflows to the chamber during the first dielectric layer depositing, withthe concentration of the second dopant in the first dielectric layerbeing at some desired measurable value.
 18. The method of claim 11comprising flowing another vapor precursor to the chamber duringdepositing at least one of the first and second dielectric layers. 19.The method of claim 11 comprising combining the vaporized first andsecond precursors prior to flowing them to the chamber to chemical vapordeposit the first dielectric layer.
 20. The method of claim 11comprising combining the vaporized first, second, and third precursorsprior to flowing them to the chamber to chemical vapor deposit thesecond dielectric layer.
 21. The method of claim 11 comprising stoppingflow of the first and second vaporized precursors to the chamberintermediate the chemical is vapor depositing of the first and seconddielectric layers.
 22. The method of claim 11 comprising continuing tovaporize the first and second precursors while stopping flow of thefirst and second vaporized precursors to the chamber intermediate thechemical vapor depositing of the first and second dielectric layers. 23.The method of claim 11 comprising bypassing flow of the first and secondvaporized precursors to the chamber prior to the directing.
 24. Themethod of claim 11 comprising bypassing flow of the first and secondvaporized precursors to the chamber after depositing the firstdielectric layer prior to depositing the second dielectric layer.
 25. Achemical vapor deposition method of depositing a dielectric materialcomprising: providing a semiconductor substrate within a chemical vapordeposition chamber; providing first, second and third liquid vaporizershaving respective first, second and third exiting vapor flowpaths whichcombine to form a combined flowpath; vaporizing a first liquiddeposition precursor with the first vaporizer forming a flowing firstvaporized precursor within the combined flowpath; vaporizing a secondliquid deposition precursor with the second vaporizer forming a flowingsecond vaporized precursor comprising a first dopant within the combinedflowpath with the flowing first vaporized precursor; initially bypassingthe flowing first and second vaporized precursors within the combinedflowpath from entering the chamber for a first period of time while thesubstrate is in the deposition chamber; after the first period of time,directing the flowing first and second vaporized precursors within thecombined flowpath to flow into the chamber with the substrate thereinunder conditions effective to chemical vapor deposit a first dielectriclayer comprising the first dopant over the substrate; after depositingthe first dielectric layer, second bypassing the flowing first andsecond vaporized precursors within the combined flowpath from enteringthe chamber while the substrate is in the deposition chamber; vaporizinga third deposition precursor with the third vaporizer forming a flowingthird vaporized precursor comprising a second dopant different from thefirst dopant, and combining the flowing third vaporized precursor withthe flowing second bypassed first and second vaporized precursors in thecombined flowpath and bypassing the combined flowing first, second andthird vaporized precursors within the combined flowpath from enteringthe chamber for a second period of time while the substrate is in thedeposition chamber; and after the second period of time, directing thecombined flowing first, second and third vaporized precursors within thecombined flowpath to flow into the chamber with the substrate thereinunder conditions effective to chemical vapor deposit a second dielectriclayer comprising the first and second dopants over the first, dielectriclayer, the second dielectric layer comprising a greater concentration ofthe second dopant than any concentration of the second dopant in thefirst dielectric layer.
 26. The method of claim 25 flowing a fourthprecursor to the chamber separate from the combined flowpath duringforming of each of the first and second dielectric layers.
 27. Themethod of claim 25 comprising chemical vapor depositing the seconddielectric layer onto the first dielectric layer.
 28. The method ofclaim 25 wherein no third vaporized precursor flows to the chamberduring the first dielectric layer depositing.
 29. The method of claim 25wherein no third vaporized precursor flows to the chamber during thefirst dielectric layer depositing, with the concentration of the seconddopant in the first dielectric layer being substantially zero.
 30. Themethod of claim 25 wherein some third vaporized precursor flows to thechamber during the first dielectric layer depositing, with theconcentration of the second dopant in the first dielectric layer beingat some desired measurable value.
 31. The method of claim 25 wherein theflowing of the vaporized precursors during the first and second periodsof time is not steady state during all of said first and second periods.32. The method of claim 25 wherein the first and second periods of timeare effective to achieve steady state flow of the vaporized precursorsat conclusion of said respective periods.
 33. The method of claim 25comprising depositing the first dielectric layer to a thickness of fromabout 50 Angstroms to about 500 Angstroms.
 34. The method of claim 25comprising depositing the first dielectric layer to a thickness of fromabout 100 Angstroms to about 300 Angstroms.
 35. A method of etching acontact opening over a node location on a semiconductor substrate,comprising: forming a dielectric first layer over a node location;forming an oxide second layer having plural dopants therein over thedielectric first layer, the oxide second layer having an innermostportion and an outer portion, the outer portion having a higherconcentration of one of the dopants than any concentration of the onedopant in the innermost portion; using a single dry etching chemistry,etching a contact opening into the outer and innermost portions of theoxide second layer to proximate the dielectric first layer over the nodelocation; and etching, into the, dielectric first layer through thecontact opening to proximate the node location.
 36. The method of claim35 wherein the dielectric first layer comprises a substantially undopedoxide.
 37. The method of claim 35 wherein the dielectric first layercomprises a substantially undoped oxide, and the oxide second layer isformed on the dielectric first layer.
 38. The method of claim 35 whereinthe dielectric first layer comprises a nitride.
 39. The method of claim35 wherein the oxide second layer is formed on the dielectric firstlayer, the dielectric first layer comprises a substantially undopedoxide, and the etching into the dielectric first layer through thecontact opening to proximate the node location comprises continuing theetching with the single dry etching chemistry at least until the nodelocation is outwardly exposed.
 40. The method of claim 35 wherein theetching the dielectric first layer to proximate the node locationcomprises a dry etch chemistry the same as the single dry etchingchemistry.
 41. The method of claim 35 further comprising forming a thirddielectric layer over the oxide second layer, and etching the thirddielectric layer using a chemistry different from the single dry etchingchemistry prior to etching said contact opening.
 42. The method of claim35 wherein the node location is formed between a pair of field effecttransistor gate lines.
 43. The method of claim 35 wherein the nodelocation comprises a diffusion region formed in semiconductive materialreceived between a pair of field effect transistor gate lines.
 44. Themethod of claim 35 comprising forming the innermost portion to containsome measurable quantity of the one dopant.
 45. The method of claim 35comprising forming the innermost portion to contain no measurablequantity of the one dopant.
 46. The method of claim 35 comprisingforming the innermost portion to a thickness of from about 50 Angstromsto about 500 Angstroms.
 47. The method of claim 35 comprising formingthe innermost portion to a thickness of from about 100 Angstroms toabout 300 Angstroms.
 48. The method of claim 35 comprising forming thecontact opening in the oxide second layer to have an aspect ratio of atleast 4.0.
 49. A method of etching a contact opening over a nodelocation on a semiconductor substrate, comprising: forming a dielectricfirst layer over a node location; forming an oxide second layer havingplural dopants therein over the dielectric first layer, the oxide secondlayer having an innermost portion and an outer portion, the innermostportion having a higher concentration of one of the dopants than anyconcentration of the one dopant in the outer portion; using a single dryetching chemistry, etching a contact opening into the outer andinnermost portions of the oxide second layer to proximate the dielectricfirst layer over the node location; and if etching into the dielectricfirst layer through the contact opening to proximate the node location.50. The method of claim 49 comprising forming the oxide second layer onthe dielectric first layer.
 51. The method of claim 49 comprisingforming the outer portion to contain some measurable quantity of the onedopant.
 52. The method of claim 49 comprising forming the outer portionto contain no measurable quantity of the one dopant.
 53. The method ofclaim 49 comprising forming the innermost portion to a thickness of fromabout 100 Angstroms to about 300 Angstroms.
 54. A method of etching acontact opening over a node location on a semiconductor substrate,comprising: forming a boron and phosphorus doped oxide layer over a nodelocation, the doped oxide layer having an innermost portion and an outerportion, the outer portion having a higher concentration of boron thanany concentration of boron in the innermost portion; and using a singledry etching chemistry, etching a contact opening into the outer andinnermost portions over the node location.
 55. The method of claim 54comprising forming the doped oxide layer over a dielectric layer, andetching the dielectric layer through the contact opening and to exposethe node location.
 56. The method of claim 54 comprising forming theinnermost portion to contain some measurable quantity of boron.
 57. Themethod of claim 54 comprising forming the innermost portion to containno measurable quantity of boron.
 58. The method of claim 54 wherein thechemistry comprises a combination of CHF₃, CF₄, and CH₂F₂.
 59. Themethod of claim 54 comprising forming the contact opening in the oxidelayer to have an aspect ratio of at least 4.0.
 60. A method of etching acontact opening over a node location on a semiconductor substrate,comprising: forming a dielectric layer over a node location, the nodelocation comprising a diffusion region formed in semiconductive materialreceived between a pair of field effect transistor gate lines; forming aboron and phosphorus doped oxide layer on the dielectric layer, thedoped oxide layer having an innermost portion and an outer portion, theouter portion having a higher concentration of boron than anyconcentration of boron in the innermost portion; using a single dryetching chemistry, etching a contact opening into the outer andinnermost portions of the oxide layer to proximate the dielectric layerover the, node location; and etching into the dielectric layer throughthe contact opening to outwardly expose the node location.
 61. Themethod of claim 60 comprising forming the innermost portion to containsome measurable quantity of boron.
 62. The method of claim 60 comprisingforming the innermost portion to contain no measurable quantity ofboron.
 63. A method of etching a contact opening over a node location ona semiconductor substrate, comprising: forming a boron and phosphorusdoped oxide layer over a node location, the doped oxide layer having aninnermost portion and an outer portion, the innermost portion having ahigher concentration of phosphorus than any concentration of phosphorusin the outer portion; and using a single dry etching chemistry, etchinga contact opening into the outer and innermost portions over the nodelocation.
 64. The method of claim 63 comprising forming the doped oxidelayer over a dielectric layer, and etching the dielectric layer throughthe contact opening and to expose the node location.
 65. The method ofclaim 63 comprising forming the outer portion to contain some measurablequantity of phosphorus.
 66. The method of claim 63 comprising formingthe outer portion to contain no measurable quantity of phosphorus. 67.The method of claim 63 comprising forming the contact opening in theoxide layer to have an aspect ratio of at least 4.0.
 68. A method ofetching a contact opening over a node location on a semiconductorsubstrate, comprising: forming a dielectric layer over a node location,the node location comprising a diffusion region formed in semiconductivematerial received between a pair of field effect transistor gate lines;forming a boron and phosphorus doped oxide layer on the dielectriclayer, the doped oxide layer having an innermost portion and an outerportion, the innermost portion having a higher concentration ofphosphorus than any concentration of phosphorus in the outer portion;using a single dry etching chemistry, etching a contact opening into theouter and innermost portions of the oxide layer to proximate thedielectric layer over the node location; and etching into the dielectriclayer through the contact opening to outwardly expose the node location.69. The method of claim 68 comprising forming the outer portion tocontain some measurable quantity of phosphorus.
 70. The method of claim68 comprising forming the outer portion to contain no measurablequantity of phosphorus.
 71. A method of etching a contact opening over anode location on a semiconductor substrate, comprising: forming a boronand phosphorus doped oxide layer over a node location, the doped oxidelayer having an innermost portion and an outer portion, the outerportion having a higher concentration of boron than a concentration ofboron in the innermost portion, the innermost portion having a higherconcentration of phosphorus than a concentration of phosphorus in theouter portion; and using a single dry etching chemistry, etching acontact opening into the outer and innermost portions over the nodelocation.
 72. A method of etching a contact opening over a node locationon a semiconductor substrate, comprising: forming a dielectric layerover a node location, the node location comprising a diffusion regionformed in semiconductive material received between a pair of fieldeffect transistor gate lines; forming a boron and phosphorus doped oxidelayer on the dielectric layer, the doped oxide layer having an innermostportion and an outer portion, the outer portion having a higherconcentration of boron than a concentration of boron in the innermostportion, the innermost portion having a higher concentration ofphosphorus than a concentration of phosphorus in the outer portion;using a single dry etching chemistry, etching a contact opening throughthe outer and innermost portions over the node location; and etchinginto the dielectric layer through the contact opening to outwardlyexpose the node location.